Configuration Options for 18F66J11

Background Debugger:
	DEBUG = ON		Enabled
	DEBUG = OFF		Disabled

Extended Instruction Set:
	XINST = OFF		Disabled
	XINST = ON		Eanbled

Stack Overflow/Underflow Reset:
	STVREN = OFF		Reset disabled
	STVREN = ON		Reset enabled

Watchdog Timer Enable:
	WDTEN = OFF		WDT disabled
	WDTEN = ON		WDT enabled

Code Protection:
	CP0 = ON		code protected
	CP0 = OFF		not code protected

CPU System Clock Postscaler:
	CPUDIV = OSC4_PLL6	CPU System Clock / 6
	CPUDIV = OSC3_PLL3	CPU System Clock / 3
	CPUDIV = OSC2_PLL2	CPU System CLock / 2
	CPUDIV = OSC1		No Clock Divide

Two Speed Start Up:
	IESO = OFF		Disabled
	IESO = On		Enabled

Fail Safe Clock Monitor:
	FCMEN = OFF		Disabled
	FCMEN = ON		Enabled

Oscillator Selection:
	FOSC = INTOSC		Internal oscillator, port on RA6 and RA7
	FOSC = INTOSCO		Internal oscillator, CLKOUT on RA6 and port on RA7
	FOSC = INTOSCPLL	Internal oscillator with PLL enabled, port on RA6 and RA7
	FOSC = INTOSCPLLO	Internal oscillator with PLL enabled, CLKOUT on RA6 and port on RA7
	FOSC = HS		HS oscillator
	FOSC = HSPLL		HS with PLL
	FOSC = EC		EC oscillator with CLKOUT on RA6
	FOSC = ECPLL		EC oscillator with PLL

Watchdog Timer Postscaler:
	WDTPS = 1		1:1
	WDTPS = 2		1:2
	WDTPS = 4		1:4
	WDTPS = 8		1:8
	WDTPS = 16		1:16
	WDTPS = 32		1:32
	WDTPS = 64		1:64
	WDTPS = 128		1:128
	WDTPS = 256		1:256
	WDTPS = 512		1:512
	WDTPS = 1024		1:1024
	WDTPS = 2048		1:2048
	WDTPS = 4096		1:4096
	WDTPS = 8192		1:8192
	WDTPS = 16384		1:16384
	WDTPS = 32768		1:32768

MSSP Address Mask:
	MSSPMSK = MSK5		5 bit address masking
	MSSPMSK = MSK7		7 bit address masking

ECCP2 MUX:
	CCP2MX = ALTERNATE	ECCP2/P2A is multiplexed with RE7 in Microcontroller mode or with RB3 in Extended Microcontroller mode
	CCP2MX = DEFAULT	ECCP2/P2A is multiplexed with RC1