Configuration Options for 18F6410

   Oscillator Selection:
     OSC = LP             LP
     OSC = XT             XT
     OSC = HS             HS
     OSC = RC             RC-OSC2 as Clock Out
     OSC = EC             EC-OSC2 as Clock Out
     OSC = ECIO           EC-OSC2 as RA6
     OSC = HSPLL          HS-PLL Enabled
     OSC = RCIO           RC-OSC2 as RA6
     OSC = INTIO67        INTRC-OSC2 as RA6, OSC1 as RA7
     OSC = INTIO7         INTRC-OSC2 as Clock Out, OSC1 as RA7

   Fail Safe Clock Monitor:
     FCMEN = OFF          Disabled
     FCMEN = ON           Enabled

   Internal External Osc. Switch Over:
     IESO = OFF           Disabled
     IESO = ON            Enabled

   Power Up Timer:
     PWRT = ON            Enabled
     PWRT = OFF           Disabled

   Brown Out Reset:
     BOREN = OFF          Disabled
     BOREN = ON           SBOREN Enabled
     BOREN = NOSLP        Enabled except SLEEP, SBOREN Disabled
     BOREN = SBORDIS      Enabled, SBOREN Disabled

   Brown Out Voltage:
     BORV = 45            4.5V
     BORV = 42            4.2V
     BORV = 27            2.7V
     BORV = 25            2.5V

   Watchdog Timer:
     WDT = OFF            Disabled
     WDT = ON             Enabled

   Watchdog Postscaler:
     WDTPS = 1            1:1
     WDTPS = 2            1:2
     WDTPS = 4            1:4
     WDTPS = 8            1:8
     WDTPS = 16           1:16
     WDTPS = 32           1:32
     WDTPS = 64           1:64
     WDTPS = 128          1:128
     WDTPS = 256          1:256
     WDTPS = 512          1:512
     WDTPS = 1024         1:1024
     WDTPS = 2048         1:2048
     WDTPS = 4096         1:4096
     WDTPS = 8192         1:8192
     WDTPS = 16384        1:16384
     WDTPS = 32768        1:32768

   MCLR Enable:
     MCLRE = OFF          Disabled
     MCLRE = ON           Enabled

   Low Power Timer1 Selection:
     LPT1OSC = OFF        High Power, High noise immunity T1OSC selected
     LPT1OSC = ON         Low Power, Low noise immunity T1OSC selected

   CCP2 Mux:
     CCP2MX = PORTBE      CCP2 input/output is multiplexed with RE7/RB3
     CCP2MX = PORTC       CCP2 input/output is multiplexed with RC1

   Stack Overflow Reset:
     STVREN = OFF         Disabled
     STVREN = ON          Enabled

   Extended Instruction set Enable:
     XINST = OFF          Disabled
     XINST = ON           Enabled

   Background Debugger Enable:
     DEBUG = ON           Enabled
     DEBUG = OFF          Disabled

   Code Protection:
     CP = ON              Enabled
     CP = OFF             Disabled

   Table Read Protection Internal Memory:
     EBTR = ON            Enabled
     EBTR = OFF           Disabled