Configuration Options for 18F2550
96MHz PLL Prescaler:
PLLDIV = 1 No devide (4MHz input)
PLLDIV = 2 Divide by 2 (8MHz input)
PLLDIV = 3 Divide by 3 (12MHz input)
PLLDIV = 4 Divide by 4 (16MHz input)
PLLDIV = 5 Divide by 5 (20MHz input)
PLLDIV = 6 Divide by 6 (24MHz input)
PLLDIV = 10 Divide by 10 (40MHz input)
PLLDIV = 12 Divide by 12 (48MHz input)
CPU System Clock Postscaler:
CPUDIV = OSC1_PLL2 [OSC1/OSC2 Src: /1][96MHz PLL Src: /2]
CPUDIV = OSC2_PLL3 [OSC1/OSC2 Src: /2][96MHz PLL Src: /3]
CPUDIV = OSC3_PLL4 [OSC1/OSC2 Src: /3][96MHz PLL Src: /4]
CPUDIV = OSC4_PLL6 [OSC1/OSC2 Src: /4][96MHz PLL Src: /6]
Full-Speed USB Clock Source Selection:
USBDIV = 1 Clock source from OSC1/OSC2
USBDIV = 2 Clock source from 96MHz PLL/2
Oscillator Selection bits:
FOSC = XT_XT XT oscillator, XT used by USB
FOSC = XTPLL_XT XT oscillator, PLL enabled, XT used by USB
FOSC = ECIO_EC External clock, port function on RA6, EC used by USB
FOSC = EC_EC External clock, CLKOUT on RA6, EC used by USB
FOSC = ECPLLIO_EC External clock, PLL enabled, port function on RA6, EC used by USB
FOSC = ECPLL_EC External clock, PLL enabled, CLKOUT on RA6, EC used by USB
FOSC = INTOSCIO_EC Internal oscillator, port function on RA6, EC used by USB
FOSC = INTOSC_EC Internal oscillator, CLKOUT on RA6, EC used by USB
FOSC = INTOSC_XT Internal oscillator, XT used by USB
FOSC = INTOSC_HS Internal oscillator, HS used by USB
FOSC = HS HS oscillator, HS used by USB
FOSC = HSPLL_HS HS oscillator, PLL enabled, HS used by USB
Fail Safe Clock Monitor:
FCMEM = OFF Disabled
FCMEM = ON Enabled
Internal/External Switch Over:
IESO = OFF Disabled
IESO = ON Enabled
Power Up Timer:
PWRT = ON Enabled
PWRT = OFF Disabled
Brown Out Reset:
BOR = OFF Disabled
BOR = SOFT Controled by SBOREN
BOR = ON_ACTIVE Enabled when the device is not in SLEEP, SBOREN bit is disabled
BOR = ON Enabled, SBOREN bit is disabled
Brown Out Voltage:
BORV = 46 4.6V
BORV = 43 4.3V
BORV = 28 2.8V
BORV = 21 2.1V
USB Voltage Regulator Enable:
VREGEN = OFF Disabled
VREGEN = ON Enabled
Watchdog Timer:
WDT = OFF HW Disabled - SW Controlled
WDT = ON HW Enabled - SW Disabled
Watchdog Postscaler:
WDTPS = 1 1:1
WDTPS = 2 1:2
WDTPS = 4 1:4
WDTPS = 8 1:8
WDTPS = 16 1:16
WDTPS = 32 1:32
WDTPS = 64 1:64
WDTPS = 128 1:128
WDTPS = 256 1:256
WDTPS = 512 1:512
WDTPS = 1024 1:1024
WDTPS = 2048 1:2048
WDTPS = 4096 1:4096
WDTPS = 8192 1:8192
WDTPS = 16384 1:16384
WDTPS = 32768 1:32768
MCLR Enable:
MCLRE = OFF Disabled
MCLRE = ON Enabled
Low Power Timer1 Oscillator Enable:
LPT1OSC = OFF Timer1 oscillator configured for high power
LPT1OSC = ON Timer1 oscillator configured for low power
Port B A/D Enable:
PBADEN = OFF PortB<4:0> pins are configured as digital I/O on RESET
PBADEN = ON PortB<4:0> pins are configured as analog input on RESET
CCP2 Mux bit:
CCP2MX = OFF CCP2 input/output is multiplexed with RB3
CCP2MX = ON CCP2 input/output is multiplexed with RC1
Stack Overflow Reset:
STVREN = OFF Disabled
STVREN = ON Enabled
Low Voltage ICSP:
LVP = OFF Disabled
LVP = ON Enabled
Dedicated In-Circuit Debug/Programming Enable:
ICPRT = OFF Disabled
ICPRT = ON Enabled
Extended Instruction Set Enable:
XINST = OFF Disabled
XINST = ON Enabled
Background Debugger Enable:
DEBUG = ON Enabled
DEBUG = OFF Disabled
Code Protection Block 0:
CP0 = ON Enabled
CP0 = OFF Disabled
Code Protection Block 1:
CP1 = ON Enabled
CP1 = OFF Disabled
Code Protection Block 2:
CP2 = ON Enabled
CP2 = OFF Disabled
Code Protection Block 3:
CP3 = ON Enabled
CP3 = OFF Disabled
Boot Block Code Protection:
CPB = ON Enabled
CPB = OFF Disabled
Data EEPROM Code Protection:
CPD = ON Enabled
CPD = OFF Disabled
Write Protection Block 0:
WRT0 = ON Enabled
WRT0 = OFF Disabled
Write Protection Block 1:
WRT1 = ON Enabled
WRT1 = OFF Disabled
Write Protection Block 2:
WRT2 = ON Enabled
WRT2 = OFF Disabled
Write Protection Block 3:
WRT3 = ON Enabled
WRT3 = OFF Disabled
Boot Block Write Protection:
WRTB = ON Enabled
WRTB = OFF Disabled
Configuration Register Write Protection:
WRTC = ON Enabled
WRTC = OFF Disabled
Data EEPROM Write Protection:
WRTD = ON Enabled
WRTD = OFF Disabled
Table Read Protection Block 0:
EBTR0 = ON Enabled
EBTR0 = OFF Disabled
Table Read Protection Block 1:
EBTR1 = ON Enabled
EBTR1 = OFF Disabled
Table Read Protection Block 2:
EBTR2 = ON Enabled
EBTR2 = OFF Disabled
Table Read Protection Block 3:
EBTR3 = ON Enabled
EBTR3 = OFF Disabled
Boot Block Table Read Protection:
EBTRB = ON Enabled
EBTRB = OFF Disabled